ConvNeXt-T / ImageNet's per-replica batch, spelled ONCE for the whole convnextin_* family.

64, not the 32 every other ConvNeXt render uses, and the reason is a PAIRING fact rather than a throughput one. This net's JAX reference trains at global 256 = 4 × 64 (its own banner: batch 256 (4x64) · SPE 5004). At 4 × 32 the verified job would run half the batch, twice the updates, and an LR off the linear-scaling rule: a RECIPE difference, not a lowering difference, and it would forfeit the only thing this pair is in the book for: ConvNeXt has no BatchNorm, so a tie here says the LOWERER is clean and an offset here implicates the lowerer or the feed fleet-wide. Neither reading survives if the batch does not match.

Spelled once because it has to reach every convnextin_* #eval AND both halves of every train step (body at N := bB, wrapper via cBS).

ConvNeXt-S's and -B's EMA pair renders and eval forwards are at this batch too; their adam* train steps stay at the 32 default. A job's LEAN_MLIR_BATCH must match its render — the PRECHECK in scripts/jobs/cnx-default-4gpu.conf greps the artifact for its own baked batch and is the template for that.

The full ConvNeXt-T [3,3,9,3] forward at the batched index. Node for node the same chain convNextFwdChain emits — 4×4/s4 patchify stem (3→96, 224→56) → stem channel-LN → 4 stages at 56/28/14/7 with 2×2/s2 downsamples between → GAP(7×7) → dense(768→nClasses).

Every node is a batchOp/*B form, so den is a batchMap/batchMapAux at N := bB and the batch is an index of the AST rather than a number only pretty knows. That is the entire content of the move; the emitted text is unchanged, which the tie checks.

sd := true adds the 18 stochastic-depth sites, one per block, at ramp index cnxBlockIdx si j — and the sites are emitted in the FORWARD as well as the train step deliberately: at eval the driver supplies an all-ones mask, so they are the exact identity, and the forward ⊂ train-step prefix audit keeps a partner for the SD render instead of quietly not covering it.

@convnext_fwd_b — the batched-index peer of convNextFwdText, same signature (182 parameters at ConvNeXt-T) and same %x. This WRITES convnext_fwd, convnextin_fwd, convnextsin_fwd and convnextbin_fwd (the #evals at the bottom of this file); convnext-fwd-b-tie renders the per-example chain against these bytes.

The whole-net batched traversal — forward + cotangent + every parameter gradient, the batched peer of convNextBackAll true (some …). Returns (code, gradMap, softmaxSSA) with the same shape, so the AdamW tail in ConvNeXtRender.lean can consume either.

AdamW only, deliberately. The per-example traversal serves both renders off one adam flag; this one does not, because the SGD path bakes lr as a literal where AdamW takes it as a runtime %lr operand, and an SGD render at the batched index is not something any config asks for yet. Adding the flag later is cheap; an artifact nobody loads is a silent-hyperparameter hazard.

The %dgi/%dgb/%dgn/%dgd/%dgapf GAP-backward block is hand-written text on both sides, carried over verbatim. It is one of the declared non-AST carve-outs, so the batched move neither improves nor degrades it — but note it is parameterised by bB and therefore already batch-correct, which is why it needs no peer.

The ConvNeXt-T AdamW train step at the batched index. It is the SAME renderer the per-example path uses — convNextAdamTrainStepText with traversal pointed at convNextBackAllB — not a copy.

That is possible because the AdamW tail is entirely parameter-space: adamMNextF, adamVNextF, adamWParamF, gradSumSqAccF and clipScaleF are indexed by the parameter's own size and never see the batch. So "the AdamW tail at the batched index" is no work at all — the batch is factored out of it by the ops' own shapes. The only thing that moves is which traversal produced the gradients.

The drop-free forward's banner — the line ConvNeXtRender.convNextFwdText emits, restated here so the byte tie can demand byte-identity rather than "identical apart from a comment". Worth the parameter: a tie that compares modulo one line is a tie with a hole in it, and the hole is exactly where a renderer's own description of what it did would live. This is the banner the committed convnext_fwd / convnextin_fwd / convnextsin_fwd / convnextbin_fwd carry, which is why it takes the size: the model name is derived from the stage table, exactly as the per-example line derives it.

The SD forward's banner. Its own, and not cnxFwdBanner, because these bytes ARE a different render and a banner claiming otherwise would misdescribe the artifact it heads.